SYS_cpuClock.c

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/*****************************************************************************
                           C   M O D U L E   F I L E

    Copyright (c) 2003 Neuros Audio LLC, All rights reserved.

******************************************************************************/


/*-- HEADER FILE INCLUDES ---------------------------------------------------*/
#include "sys_clock.h"

/*-- LOCAL DEFINITIONS ------------------------------------------------------*/

#define BASE_TIMER_RATE     (200)         /* Hz, sytem starts up at 100MHz, 5ms */
#define BASE_TIMER_RATE_INV (0x4c4b4000L) /* 5,000,000ns * 256 */

/*-- STATIC DATA ------------------------------------------------------------*/

/*-- GLOBAL DATA ------------------------------------------------------------*/
//UINT32 CPU_clock;                       // Active CPU clock.
UINT16 TIM_resolution;                // TIMER resolution.

/*-- FUNCTIONS --------------------------------------------------------------*/
#pragma CODE_SECTION(SYS_clockSetup, ".sram0_resident")
void SYS_clockSetup(CLOCK_MODE eMode)
{   
    UINT32 CPU_clock;   
    
    // This is to remember what clock state it was.
    static CLOCK_MODE   actvClockMode = Invalid_ClockMode;
    
    if(actvClockMode == eMode)
    {
        return;
    }
        
    CLKMD = 0xF000;
    
    while(CLKMD&0x0001);            
    
    CLKMD = eMode;  

    // Set the system timer to a constant rate even though 
    // the DSP clock can change. 
    CPU_clock = (UINT32)SYS_getCPUClock();
    
    // calculate the total divide ratio for the desired 
    // system timer rate.
    #if 1 /* TINT rate = 1/( (1+PRD)*(1+TDDR)*tc ). TDDR is fixed to 15. */
    PRD = (CPU_clock / ( (UINT32)(BASE_TIMER_RATE * 16) ) ) - 1;                        
    #else
    PRD = (CPU_clock / ( (UINT32)(BASE_TIMER_RATE * 10) ) ) - 1;
    #endif  

    // restart the timer.
    TCR |= 0x2F;        

    // TIM_resolution, ns/tick in 11.4 format.
    TIM_resolution = ((UINT32)(BASE_TIMER_RATE_INV/(PRD+1))+ 0x8)>>4;
    
    actvClockMode = eMode;
}

#pragma CODE_SECTION(SYS_getCPUClock, ".sram0_resident")
UINT32 SYS_getCPUClock( void ) 
{
    UINT16 Multiplier, PLLMUL, Divider; 
    UINT16 PLLNDIV, PLLDIV;
        
    
    // Read back CLKMOD register value.
    PLLMUL = CLKMD >> 12;   
    
    PLLDIV = (CLKMD >> 11) & 0x1;   
    
    PLLNDIV = (CLKMD >> 1) & 0x1;
    
    Divider = 1;
    
    Multiplier = 1; 
    
    if (PLLDIV && PLLNDIV)
    {   
        Multiplier = (PLLMUL & 0x01)?  PLLMUL / 4 : (PLLMUL + 1) / 2;
    }
    
    else if (!PLLNDIV)
    {
        // This is the /2 or /4 modes.
        Divider = (PLLMUL == 15)? 4 : 2;
    }
    
    else 
    {

        if (PLLMUL != 15) Multiplier = PLLMUL + 1;
    }

    return((UINT32)((UINT32)(SYSTEM_CLOCK * Multiplier)) / Divider);
}


/*****************************************************************************
                Neuros Audio LLC. Confidential Proprietary
 *****************************************************************************/

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